34From the lab to the plant
20 interview questions on ST and PLC programming, with answers
The questions control engineers actually get asked, with a short correct answer for each, from the scan cycle to what you would never do online.
How to read this list
The answers are as short as an interview answer should be: one to three sentences. The interviewer is testing understanding, not a memorised definition, and the best answer ends with an example from work you actually did.
1. What is the scan cycle?
A loop of three phases that never stops: read the inputs into the input image, execute the program top to bottom, write the output image to the field. An input value cannot change mid-scan, which is what makes behaviour predictable.
2. TON versus TOF?
TON delays on: Q goes true after IN has been true for PT. TOF delays off: Q follows IN immediately on the rising edge and stays true for PT after IN drops. The first confirms a condition; the second keeps a fan or a lamp running after a stop.
3. FUNCTION versus FUNCTION_BLOCK?
A function has no memory: the same inputs always give the same output. A function block has memory per instance, which is how a timer knows how much time has passed. Timers, counters and PID are function blocks for exactly that reason.
4. Why := and not =?
:= is assignment, it writes a value into a variable. = is comparison, it produces a BOOL. ST inherited this from Pascal, and the benefit is that confusing the two does not pass silently the way it can in other languages.
5. What are RETAIN variables, and when do you use them?
Variables that keep their value through a power cycle: production counters, motor run hours, operator-edited setpoints. Never put safety state in them. After a power loss the machine must start from a known safe state, not resume mid-stroke.
6. How do you detect a rising edge?
Either R_TRIG from the library, or by hand:
Edge := Signal AND NOT SignalLast;
SignalLast := Signal;You need it for every event: counting a part, logging an alarm, starting a sequence. Without an edge the event repeats once per scan.
7. What does 7 / 2 give in ST?
3 if both operands are INT, because integer division truncates. Use 7.0 / 2.0, or convert with INT_TO_REAL. In scaling maths, multiply before you divide to keep the precision.
8. What is the watchdog, and why does it stop the controller?
A timer that measures the cycle time. If one scan exceeds the limit the controller faults and goes to STOP. The reasoning: a controller that is late for the process is more dangerous than one that is stopped in a known way. The usual cause is a WHILE that never ends.
9. CASE or IF?
CASE when you are choosing between mutually exclusive states on one integer: a step number, an operating mode, a fault code. IF/ELSIF when the conditions are unrelated. A state machine written as CASE can be read; the same thing as twenty ELSIF branches cannot.
10. How do you build a state machine in ST?
An INT for the step and a CASE with one branch per step. Each branch sets its outputs and has one clear transition condition. Add a timeout to every step that waits on a physical event, a fault state with a number well away from the sequence, and set each output in exactly one place.
11. Where does ST beat ladder?
Maths, filters and scaling; loops over many devices; long state machines; data handling and communications; and any code you want to diff in Git. Ladder stays better for the interlocks a maintenance technician reads in front of the panel.
12. What changes in Siemens SCL?
The # prefix on local variables and quotes on global tags, TON_TIME as the timer, a semicolon after END_IF, and optimized blocks that remove absolute addressing such as %MD20. The logic ports; the syntax changes.
13. And in Rockwell?
No # prefix, and the timer is a TIMER structure with PRE in milliseconds plus ACC and DN instead of PT, ET and Q. Reusable logic is wrapped in an AOI rather than a FUNCTION_BLOCK.
14. An alarm is chattering around its threshold. What do you do?
Three layers, in order. A deadband: raise at 90%, clear only below 85%. A time delay with TON: raise only if the condition holds for two seconds. Then acknowledge: the alarm does not disappear on its own before a human has seen it. If it still chatters, the problem is the measurement, not the program.
15. What is anti-windup in a PID?
When the output hits a limit, a fully open valve for example, the integral term keeps accumulating to no effect, so the controller is slow to come back when the error changes sign. The fix is to stop integrating while the output is saturated, or to feed back the difference between the calculated and the limited output. Without it you see a large overshoot after every saturation.
16. What is the risk of going out of ARRAY bounds?
A write past the end corrupts neighbouring memory. Some controllers fault and stop, others carry on with undefined behaviour. Range-check the index before you use it, or use FOR with fixed bounds, and be especially careful with an index that arrives from an HMI or over a network.
17. What is a first-out alarm, and why does it matter?
On a major trip dozens of signals collapse together and the screen fills with consequences rather than the cause. First-out logic captures and flags the alarm that came first, so the operator knows where the failure began. It is implemented as a latch that locks on the first alarm and does not update until it is reset.
18. What are task priorities?
A modern controller runs several tasks: a fast one every 10 ms for critical logic, a slower one every 100 ms for communications and reporting. The higher priority interrupts the lower. Keep the fast task small, and never write the same variable from two tasks.
19. How do you test a change safely?
Offline first: simulation, then a bench with a controller and switches. Then a second pair of eyes on the code. Then a full backup of the current project and a tagged commit. Then a download in an agreed window with the operator and the station in a safe state. Then a targeted test of what changed and what sits next to it. And a rollback plan ready before you start.
20. What would you never do online?
Edit safety or interlock logic on a running line. Force an output on connected equipment without permission and without a person at the device. Download without a backup. Change a variable type or a structure size while the process runs. Set a breakpoint on a production controller. Or test any change for the first time on the line. The right answer ends with a sentence: if there is no time to test it, there is no time to download it.
Try it in the lab
The lab runs in your browser: an ST editor, a virtual process that suits the lesson, the same program as a live ladder diagram, a watch table, and export to Siemens SCL.
What to try
- Press PB1 several times: L1 toggles on and off with each press.
- Turn on S1: L3 blinks. Why does it take two timers? Watch T1 and T2 in the ladder.
- Q2, two-hand control: on a phone press PB1 and PB2 with two fingers together; L2 lights and stays on while both are held. Press one, then the other a second later: it stays dark, because the gap was over half a second.
Terms in this lesson
People find this lesson by searching
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Course outline
- 01What is Structured Text, and when to use it instead of ladder
- 02How a PLC runs your code: the scan cycle and the process image
- 03Program structure: POUs, PROGRAM, FUNCTION and FUNCTION_BLOCK
- 04Your first program: starting a pump with seal-in logic
- 05Data types: BOOL, INT, REAL, TIME and the rest
- 06Declaring variables: VAR, VAR_INPUT and RETAIN
- 07Literals and constants: 16#FF, 2#1010 and T#5s
- 08Type conversion and scaling a 4-20 mA signal
- 09Assignment and arithmetic in ST: := and operator precedence
- 10Boolean logic, comparisons and bit operations
- 11Standard functions: ABS, SQRT, MIN, MAX, LIMIT, SEL, MUX
- 12IF, ELSIF and ELSE: the rules and when to avoid them
- 13The CASE statement and your first state machine
- 14The FOR loop and the watchdog
- 15WHILE, REPEAT, EXIT, CONTINUE and RETURN
- 16Edge detection: R_TRIG, F_TRIG and the "it fired every scan" bug
- 17Timers: TON, TOF and TP
- 18Counters: CTU, CTD and CTUD
- 19SR and RS flip-flops: which one wins
- 20Writing your own function
- 21Writing a function block
- 22Arrays in Structured Text
- 23Structs and enumerations
- 24References and pointers
- 25The state machine pattern: a batch sequence that cannot get stuck
- 26Alarm management to ISA-18.2: delay, deadband, latch, acknowledge, first-out
- 27Analogue signal processing: counts to engineering units, NE43 and filtering
- 28Closed-loop control in ST: hysteresis first, then a practical PID
- 29Motors and valves in practice: permissives, feedback and travel time
- 30The same ST on every platform: SCL, Studio 5000, CODESYS, TwinCAT
- 31Testing and debugging ST: the watch table, forcing and simulation
- 32An ST style guide: naming, comments, constants and version control
- 33Final project: a complete tank station with a state machine and alarms
- 3420 interview questions on ST and PLC programming, with answers